控制逻辑器件

  • 74AUP2G0604

    74AUP2G0604

    Low-power inverting buffer with open-drain and inverter

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  • 74AUP2G02

    74AUP2G02

    Low-power dual 2-input NOR gate

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  • 74AUP2G00

    74AUP2G00

    Low-power dual 2-input NAND gate

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  • 74AUP1Z125

    74AUP1Z125

    Low-power X-tal driver with enable and internal resistor; 3-state

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  • 74AUP1Z04

    74AUP1Z04

    Low-power X-tal driver with enable and internal resistor

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  • 74AUP1T98

    74AUP1T98

    Low-power configurable gate with voltage-level translator

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  • 74AUP1T97

    74AUP1T97

    Low-power configurable gate with voltage-level translator

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  • 74AUP1T87

    74AUP1T87

    Low-power 2-input EXCLUSIVE-NOR gate with voltage-level translator

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  • 74AUP1T86

    74AUP1T86

    Low-power 2-input EXCLUSIVE-OR gate with voltage-level translator

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  • 74AUP1T58

    74AUP1T58

    Low-power configurable gate with voltage-level translator

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  • 74AUP1T57

    74AUP1T57

    Low-power configurable gate with voltage-level translator

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  • 74AUP1T32

    74AUP1T32

    Low-power 2-input OR-gate with voltage-level translator

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