开关/多路复用器/解复用器

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74CBTLV3126-Q100

4-bit bus switch

应用领域

The 74CBTLV3126-Q100 provides a 4-bit high-speed bus switch with separate output enable inputs (1OE to 4OE). The low on-state resistance of the switch allows connections to be made with minimal propagation delay. The switch is disabled (high-impedance OFF-state) when the output enable (nOE) input is LOW.

To ensure the high-impedance OFF-state during power-up or power-down, nOE should be tied to the GND through a pull-down resistor. The current-sinking capability of the driver determines the minimum value of the resistor.

Schmitt trigger action at control input makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 2.3 V to 3.6 V.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100

产品详情

特性

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

  • Supply voltage range from 2.3 V to 3.6 V

  • Standard ’126’-type pinout

  • High noise immunity

  • Complies with JEDEC standard:

    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8-B/JESD36 (2.7 V to 3.6 V)

  • ESD protection:

    • MIL-STD-883, method 3015 exceeds 2000 V

    • HBM JESD22-A114F exceeds 2000 V

    • MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)

  • 5 Ω switch connection between two ports

  • Rail to rail switching on data I/O ports

  • CMOS low power consumption

  • Latch-up performance exceeds 250 mA per JESD78B Class I level A

  • IOFF circuitry provides partial Power-down mode operation

  • DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints


参数类型

Type numberProduct statusVCC (V)RON (Ω)Logic switching levelstpd (ns)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74CBTLV3126BQ-Q100Production2.3 - 3.67CMOS/LVTTL0.2very low-40~12510721.375DHVQFN14
74CBTLV3126PW-Q100Production2.3 - 3.67CMOS/LVTTL0.2very low-40~1251418.068TSSOP14